EP2AGX95EF29C6N Datasheet, PDF (79/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 4: DSP Blocks in Arria II Devices
4–3
DSP Block Overview
Table 4–1 lists the number of DSP blocks in Arria II devices.
Table 4–1. Number of DSP Blocks in Arria II Devices (Note 1)
Family
Device
Independent Input and Output Multiplication Operators
High
Precision
Multiplier
Adder
Mode
Four
Multiplier
Adder
Mode
9×9
12 × 12 18 × 18 18 × 18
Multipliers Multipliers Multipliers Complex
EP2AGX45 29
232
174
116
58
EP2AGX65 39
312
234
156
78
EP2AGX95 56
448
336
224
112
Arria II GX
EP2AGX125 72
576
432
288
144
EP2AGX190 82
656
492
328
164
EP2AGX260 92
736
552
368
184
EP2AGZ225 100
800
600
400
200
Arria II GZ EP2AGZ300 115
920
690
460
230
EP2AGZ350 130
1,040
780
520
260
Note to Table 4–1:
(1) The numbers in this table represents the numbers of multipliers in their respective mode.
36 × 36 18 × 36 18 × 18
Multipliers Multipliers Multipliers
58
116
232
78
156
312
112
224
448
144
288
576
164
328
656
184
368
736
200
400
800
230
460
920
260
520
1,040
Each DSP block occupies four logic array blocks (LABs) in height and you can divide
further into two half blocks that share some common clocks signals, but are for all
common purposes identical in functionality. Figure 4–1 shows the layout of each
block.
Figure 4–1. Overview of DSP Block Signals
34
Control
144
Half-DSP Block
72
Output
Data
Input ²⁸⁸
Data
144
Half-DSP Block
72
Output
Data
Full-DSP Block
December 2010 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration