EP2AGX95EF29C6N Datasheet, PDF (362/380 Pages) Altera Corporation – Device Interfaces and Integration

10–6
Chapter 10: SEU Mitigation in Arria II Devices
Error Detection Block
Error Detection Registers
There is one set of 16-bit registers in the error detection circuitry that stores the
computed CRC signature. A non-zero value on the syndrome register causes the
CRC_ERROR pin to be set high.
Figure 10–1 shows the block diagram of the error detection circuitry, syndrome
registers, and error injection block for Arria II devices.
Figure 10–1. Error Detection Circuitry, Syndrome Registers, and Error Injection Block for Arria II Devices
Readback
bitstream with
expected CRC
included
Error Detection
State Machine
Control Signals
16-Bit CRC
Calculation and Error
Search Engine
8
30
Error Message
Register
Error Injection Block
46
Fault Injection
Register
JTAG Fault
Injection Register
JTAG Update
Register
JTAG Shift
Register
User Update
Register
User Shift
Register
Syndrome
Register
16
JTAG TDO
General Routing
CRC_ERROR
Arria II Device Handbook Volume 1: Device Interfaces and Integration
February 2014 Altera Corporation