EP2AGX95EF29C6N Datasheet, PDF (90/380 Pages) Altera Corporation – Device Interfaces and Integration

4–14
Chapter 4: DSP Blocks in Arria II Devices
Arria II Operational Mode Descriptions
Arria II Operational Mode Descriptions
This section describes the operation modes of Arria II devices.
Independent Multiplier Modes
In the independent input and output multiplier mode, the DSP block performs
individual multiplication operations for general-purpose multipliers.
9-Bit, 12-Bit, and 18-Bit Multiplier
You can configure each DSP block multiplier for 9-bit, 12-bit, or 18-bit multiplication.
A single DSP block can support up to eight individual 9 × 9 multipliers, six 12 × 12
multipliers, or up to four individual 18 × 18 multipliers. For operand widths up to
9 bits, a 9 × 9 multiplier is implemented. For operand widths from 10 to 12 bits, a
12 × 12 multiplier is implemented and for operand widths from 13 to 18 bits, an
18 × 18 multiplier is implemented. This is done by the Quartus II software by zero
padding the LSBs.
Figure 4–7, Figure 4–8, and Figure 4–9 show the DSP block in the independent
multiplier operation mode. Table 4–9 on page 4–30 lists the DSP block dynamic
signals.
Figure 4–7. 18-Bit Independent Multiplier Mode Shown for Half-DSP Block
clock[3..0]
ena[3..0]
aclr[3..0]
signa
signb
output_round
output_saturate
overflow (1)
18
dataa_0[17..0]
18
datab_0[17..0]
18
dataa_1[17..0]
18
datab_1[17..0]
Half-DSP Block
Note to Figure 4–7:
(1) Block output for accumulator overflow and saturate overflow.
36
result_0[ ]
36
result_1[ ]
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010 Altera Corporation