EP2AGX95EF29C6N Datasheet, PDF (370/380 Pages) Altera Corporation – Device Interfaces and Integration

11–4
Chapter 11: JTAG Boundary-Scan Testing in Arria II Devices
BST Operation Control
Table 11–2 lists the IDCODE information for Arria II devices.
Table 11–2. 32-Bit IDCODE for Arria II Devices
Device
Version (4 Bits)
EP2AGX45
0000
EP2AGX65
0000
EP2AGX95
0000
EP2AGX125
0000
EP2AGX190
0000
EP2AGX260
0000
EP2AGZ225
0000
EP2AGZ300
0000
EP2AGZ350
0000
Notes to Table 11–2:
(1) The MSB is on the left.
(2) The IDCODE LSB is always 1.
IDCODE (32 Bits) (1)
Part Number (16 Bits)
0010 0101 0001 0010
0010 0101 0000 0010
0010 0101 0001 0011
0010 0101 0000 0011
0010 0101 0001 0100
0010 0101 0000 0100
0010 0100 1000 0001
0010 0100 0000 1010
0010 0100 1000 0010
Manufacturer Identity (11 Bits)
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
000 0110 1110
LSB (1 Bit) (2)
1
1
1
1
1
1
1
1
1
1 If the device is in the RESET state, when the nCONFIG or nSTATUS signal is low, the
device IDCODE might not be read correctly. To read the device IDCODE correctly, you
must issue the IDCODE JTAG instruction only when the nSTATUS signal is high.
f
For information about JTAG instructions, TAP controller state machine, timing
requirements, and how to select the instruction mode, refer to “IEEE Std. 1149.1 BST
Operation Control” in the IEEE 1149.1 (JTAG) Boundary-Scan Testing for Arria GX
Devices chapter in volume 2 of the Arria GX Device Handbook.
For Arria II GX devices, IEEE Std.1149.6 mandates the addition of two new
instructions: EXTEST_PULSE and EXTEST_TRAIN. These two instructions enable
edge-detecting behavior on the signal path containing the HSSI pins. These
instructions implement new test behaviors for HSSI pins and simultaneously behave
identically to the IEEE Std. 1149.1 EXTEST instruction for non-HSSI pins.
EXTEST_PULSE Instruction Mode
The instruction code for EXTEST_PULSE is 0010001111. The EXTEST_PULSE instruction
generates three output transitions:
■ Driver drives the data on the falling edge of TCK in UPDATE_IR/DR.
■ Driver drives the inverted data on the falling edge of TCK after entering the
RUN_TEST/IDLE state.
■ Driver drives the data on the falling edge of TCK after leaving the RUN_TEST/IDLE
state.
1 If you use DC-coupling on the HSSI signals, you must execute the EXTEST instruction.
If you use AC-coupling on the HSSI signals, you must execute the EXTEST_PULSE
instruction. AC-coupled and DC-coupled HSSI are only supported in
post-configuration mode.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2013 Altera Corporation