EP2AGX95EF29C6N Datasheet, PDF (221/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 7: External Memory Interfaces in Arria II Devices
Memory Interfaces Pin Support for Arria II Devices
7–19
The numbering scheme starts from the top-left side of the device going clockwise in a
die top view. Figure 7–16 shows how the DQ/DQS groups are numbered in a die top
view of the largest Arria II GX device.
Figure 7–16. DQS Pins in Arria II GX I/O Banks
DQS1T
DQS24T
DLL0
PLL1
8B
8A
PLL2
7A
7B
DQS1R
6B
Arria II GX Device
6A
PLL5
PLL6
5A
3B
3A
PLL4
DQS24B
5B
DQS24R
4A
4B
PLL3
DLL1
DQS1B
June 2011 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration