EP2AGX95EF29C6N Datasheet, PDF (200/380 Pages) Altera Corporation – Device Interfaces and Integration

6–36
Chapter 6: I/O Features in Arria II Devices
Design Considerations
I/O Bank Restrictions
Each I/O bank can simultaneously support multiple I/O standards. The following
sections provide guidelines for mixing non-voltage-referenced and voltage-referenced
I/O standards in Arria II devices.
Non-Voltage-Referenced Standards
Each Arria II device I/O bank has its own VCCIO pins and supports only one V_CCIO. An
I/O bank can simultaneously support any number of input signals with different I/O
standard assignments, as shown in Table 6–1 on page 6–2.
For output signals, a single I/O bank supports non-voltage-referenced output signals
that drive at the same voltage as V_CCIO. Because an I/O bank can only have one V_CCIO
value, it can only drive out the value for non-voltage-referenced signals. For example,
an I/O bank with a 2.5-V V_CCIO setting can support 2.5-V standard inputs and outputs
and 3.0-V LVCMOS inputs (but not output or bidirectional pins).
Voltage-Referenced Standards
To accommodate voltage-referenced I/O standards, each Arria II GX I/O bank has a
dedicated VREF pin while Arria II GZ I/O banks supports multiple VREF pins feeding a
common VREF bus. The number of available VREF pins increases as device density
increases. For Arria II GZ devices, if these pins are not used as VREF pins, they cannot
be used as generic I/O pins and must be tied to V_CCIO or GND. Each bank can only
have a single V_CCIO voltage level and a single V_REF voltage level at a given time.
Arria II GX I/O banks featuring single-ended or differential standards can support
voltage-referenced standards as long as all voltage-referenced standards use the same
V_REF setting.
For Arria II GZ devices, voltage-referenced input standards use their own V_CCPD level
as the power source. This feature allows you to place voltage-referenced input signals
in an I/O bank with a V_CCIO of 2.5 V or below. For example, you can place HSTL-15
input pins in an I/O bank with 2.5-V V_CCIO. However, the voltage-referenced input
with R_T OCT enabled requires the V_CCIO of the I/O bank to match the voltage of the
input standard.
Voltage-referenced bidirectional and output signals must be the same as the V_CCIO
voltage of the I/O bank. For example, you can only place SSTL-2 output pins in an
I/O bank with a 2.5-V V_CCIO.
Mixing Voltage-Referenced and Non-Voltage-Referenced Standards
An I/O bank can support both non-voltage-referenced and voltage-referenced pins by
applying each of the rule sets individually. For example, an I/O bank can support
SSTL-18 inputs and 1.8-V inputs and outputs with a 1.8-V V_CCIO and a 0.9-V V_REF.
Similarly, an I/O bank can support 1.5-V standards, 1.8-V inputs (but not outputs),
and HSTL and HSTL-15 I/O standards with a 1.5-V V_CCIO and 0.75-V V_REF.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2011 Altera Corporation