EP2AGX95EF29C6N Datasheet, PDF(199/380 Page) Altera Corporation – Device Interfaces and Integration

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EP2AGX95EF29C6N Datasheet, PDF (199/380 Pages) Altera Corporation – Device Interfaces and Integration

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Chapter 6: I/O Features in Arria II Devices

Design Considerations

6â35

Design Considerations

Although Arria II devices feature various I/O capabilities for high-performance and

high-speed system designs, there are several other design considerations that require

your attention to ensure the success of your designs.

I/O Termination

This section describes I/O termination requirements for single-ended and differential

I/O standards.

Single-Ended I/O Standards

Although single-ended, non-voltage-referenced I/O standards do not require

termination, impedance matching is necessary to reduce reflections and improve

signal integrity.

Voltage-referenced I/O standards require both an input reference voltage (VREF) and a

termination voltage (VTT). The reference voltage of the receiving device tracks the

termination voltage of the transmitting device. Each voltage-referenced I/O standard

requires a specific termination setup. For example, a proper resistive signal

termination scheme is critical in SSTL2 standards to produce a reliable DDR memory

system with a superior noise margin.

Arria II RS OCT provides the convenience of not using external components. When

optimizing OCT for use in typical transmission line environments, the RS OCT

impedance must be equal to or less than the transmission line impedance for optimal

performance. In ideal applications, setting the RS OCT impedance to match the

transmission line impedance avoids reflections. You can also use external pull-up

resistors to terminate the voltage-referenced I/O standards such as SSTL and HSTL

I/O standards.

Differential I/O Standards

Differential I/O standards typically require a termination resistor between the two

signals at the receiver. The termination resistor must match the differential load

impedance of the signal line. Arria II devices provide an optional differential on-chip

resistor when you use LVDS.

December 2011 Altera Corporation

Arria II Device Handbook Volume 1: Device Interfaces and Integration

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