EP2AGX95EF29C6N Datasheet, PDF (280/380 Pages) Altera Corporation – Device Interfaces and Integration

8–34
Chapter 8: High-Speed Differential I/O Interfaces and DPA in Arria II Devices
Differential Pin Placement Guidelines
A corner PLL and a center PLL can drive duplex channels in the same I/O bank, if the
channels driven by each PLL are not interleaved. No separation is necessary between
the group of channels driven by the corner and center left and right PLLs. Refer to
Figure 8–27 and Figure 8–28.
Figure 8–28. Invalid Placement of DPA-Disabled Differential I/Os Due to Interleaving of Channels
Driven by the Corner and Center PLLs
Center
PLL
Reference CLK
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
DPA-disabled
Diff I/O
Reference CLK
Center
PLL
Arria II Device Handbook Volume 1: Device Interfaces and Integration
July 2012 Altera Corporation