EP2AGX95EF29C6N Datasheet, PDF (287/380 Pages) Altera Corporation – Device Interfaces and Integration

July 2012
AIIGX51009-4.3
AIIGX51009-4.3
9. Configuration, Design Security, and
Remote System Upgrades in Arria II
Devices
This chapter describes the supported configuration schemes for Arria^® II devices,
instructions for executing the required configuration schemes, and the necessary
option pin settings. This chapter also reviews the different ways you can configure
your device and explains the design security and remote system upgrade features for
Arria II devices.
Arria II devices use SRAM cells to store configuration data. Because SRAM memory is
volatile, you must download configuration data to the Arria II device each time the
device powers up. All configuration schemes use either an external controller (for
example, a MAX^® II device or microprocessor), a configuration device, or a download
cable.
This chapter includes the following sections:
■ “Configuration Features”
■ “Power-On Reset Circuit and Configuration Pins Power Supply” on page 9–4
■ “Configuration Process” on page 9–7
■ “Configuration Schemes” on page 9–9
■ “Fast Passive Parallel Configuration” on page 9–11
■ “AS and Fast AS Configuration (Serial Configuration Devices)” on page 9–19
■ “PS Configuration” on page 9–26
■ “JTAG Configuration” on page 9–33
■ “Device Configuration Pins” on page 9–39
■ “Configuration Data Decompression” on page 9–46
■ “Remote System Upgrades” on page 9–48
■ “Remote System Upgrade Mode” on page 9–52
■ “Dedicated Remote System Upgrade Circuitry” on page 9–55
■ “Quartus II Software Support” on page 9–60
■ “Design Security” on page 9–61
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Arria II Device Handbook Volume 1: Device Interfaces and Integration
July 2012
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