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EP2AGX95EF29C6N Datasheet, PDF (357/380 Pages) Altera Corporation – Device Interfaces and Integration
February 2014
AIIGX51010-4.3
AIIGX51010-4.3
10. SEU Mitigation in Arria II Devices
This chapter describes how to activate and use the error detection cyclic redundancy
check (CRC) feature when your Arria® II device is in user mode and how to recover
from configuration errors caused by CRC errors.
In critical applications such as avionics, telecommunications, system control, and
military applications, it is important to be able to do the following:
■ Confirm that the configuration data stored in an Arria II device is correct.
■ Alert the system to the occurrence of a configuration error.
1 The error detection CRC feature is provided in the Quartus® II software starting with
version 9.1 for Arria II GX devices and version 10.1 for Arria II GZ devices.
Using the error detection CRC feature on Arria II devices has no impact on fitting or
performance.
f For more information about the CRC feature, refer to AN 539: Test Methodology of Error
Detection and Recovery using CRC in Altera FPGA Devices.
This chapter contains the following sections:
■ “Error Detection Fundamentals”
■ “Configuration Error Detection” on page 10–2
■ “User Mode Error Detection” on page 10–2
■ “Error Detection Pin Description” on page 10–5
■ “Error Detection Block” on page 10–5
■ “Error Detection Timing” on page 10–7
■ “Software Support” on page 10–9
■ “Recovering From CRC Errors” on page 10–10
Error Detection Fundamentals
Error detection determines if the data received through a medium is corrupted during
transmission. To accomplish this, the transmitter uses a function to calculate a
checksum value for the data and appends the checksum to the original data frame.
The receiver uses the function to calculate a checksum for the received data frame and
compares the received checksum to the transmitted checksum. If the two checksum
values are equal, the received data frame is correct and no data corruption occurred
during transmission or storage.
The error detection CRC feature uses the same concept. When Arria II devices are
successfully configured and in user mode, the error detection CRC feature ensures the
integrity of the configuration data.
© 2014 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off.
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www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
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information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
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Arria II Device Handbook Volume 1: Device Interfaces and Integration
February 2014
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