EP2AGX95EF29C6N Datasheet, PDF (184/380 Pages) Altera Corporation – Device Interfaces and Integration

6–20
Chapter 6: I/O Features in Arria II Devices
OCT Support
The R_S shown in Figure 6–5 is the intrinsic impedance of output transistors. The
typical R_S values are 25 and 50  .
Figure 6–5. R_S OCT without Calibration for Arria II Devices
Arria II GX Driver
Series Termination
V_CCIO
Receiving
Device
R_S
Z_O = 50 
R_S
GND
To use OCT for:
■ SSTL Class I standard—select the 50-on-chip series termination setting, thus
eliminating the external 25- R_S (to match the 50- transmission line).
■ SSTL Class II standard—select the 25- on-chip series termination setting (to
match the 50- transmission line and the near-end external 50- pull-up to V_TT).
R_S OCT with Calibration for Arria II Devices
Arria II devices support R_S OCT with calibration in all I/O banks. The R_S OCT
calibration circuit compares the total impedance of the I/O buffer to the external
25- ±1% or 50- ±1% resistors connected to the RUP and RDN pins, and dynamically
enables or disables the transistors until they match.
The R_S shown in Figure 6–6 is the intrinsic impedance of transistors. Calibration
occurs at the end of device configuration. When the calibration circuit finds the
correct impedance, it powers down and stops changing the characteristics of the
drivers.
Figure 6–6. R_S OCT with Calibration for Arria II Devices
Arria II Driver
Series Termination
V_CCIO
Receiving
Device
R_S
Z_O = 50 
R_S
GND
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2011 Altera Corporation