EP2AGX95EF29C6N Datasheet, PDF (152/380 Pages) Altera Corporation – Device Interfaces and Integration

5–44
Chapter 5: Clock Networks and PLLs in Arria II Devices
PLLs in Arria II Devices
Reconfiguring the PLL components in real time allows you to switch between two
such output frequencies in a few microseconds. You can also use this feature to adjust
the clock-to-out (t_CO) delays in real time by changing the PLL output clock phase shift.
This approach eliminates the requirement to regenerate a configuration file with the
new PLL settings.
PLL Reconfiguration Hardware Implementation
The following PLL components are reconfigurable in real time:
■ Pre-scale counter (N)
■ Feedback counter (M)
■ Post-scale output counters (C0 to C6 for Arria II GX devices and C0 to C9 for
Arria II GZ devices)
■ Post VCO divider (K)
■ Dynamically adjust the charge pump current (Icp) and loop filter components
(R and C) to facilitate reconfiguration of the PLL bandwidth
Figure 5–39 shows how you can dynamically adjust the PLL counter settings by
shifting their new settings into a serial shift-register chain or scan chain. Serial data is
the input to the scan chain with the SCANDATAPORT and shift registers are clocked by
SCANCLK. The maximum SCANCLK frequency is 100 MHz. Serial data is shifted through
the scan chain as long as the SCANCLKENA signal stays asserted. After the last bit of data
is clocked, asserting the configupdate signal for at least one SCANCLK clock cycle
causes the PLL configuration bits to be synchronously updated with the data in the
scan registers.
Figure 5–39. PLL Reconfiguration Scan Chain for Arria II Devices (Note 1)
scandata
from m counter
from n counter
PFD
LF/K/CP (3)
VCO
scanclkena
configupdate
inclk
scandataout
/Ci (2)
/Ci-1
/C2
/C1
/C0
/m
/n
scandone
scanclk
Notes to Figure 5–39:
(1) The Arria II GX PLLs and Arria II GZ left and right PLLs support C0 to C6 counters.
(2) For Arria II GX devices, i = 6. For Arria II GZ devices, i = 6 or 9.
(3) This figure shows the corresponding scan register for the K counter in between the scan registers for the charge pump and loop filter. The
K counter is physically located after the VCO.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
July 2012 Altera Corporation