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| EP2AGX95EF29C6N Datasheet, PDF (192/380 Pages) Altera Corporation – Device Interfaces and Integration | |||
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6â28
Chapter 6: I/O Features in Arria II Devices
Termination Schemes for I/O Standards
Termination Schemes for I/O Standards
The following section describes the different termination schemes for I/O standards
used in Arria II devices.
Single-Ended I/O Standards Termination
Voltage-referenced I/O standards require both an input reference voltage (VREF) and a
termination voltage (VTT). The reference voltage of the receiving device tracks the
termination voltage of the transmitting device.
Figure 6â11 shows the details of SSTL I/O termination on Arria II devices.
Figure 6â11. SSTL I/O Standard Termination for Arria II Devices
Termination
SSTL Class I
External
On-Board
Termination
Transmitter
VTT
50 ï
25 ï
50 ï
VREF
Receiver
OCT
Transmit
Series OCT
50 ï
Transmitter
VTT
50 ï
50 8ï
VREF
Receiver
Transmitter
Series OCT 25
Transmitter
SSTL Class II
VTT
VTT
50 ï
25 ï
50 ï
50 ï
VREF
VTT
VTT
50 ï 50 ï
50 ï
VREF
Receiver
Receiver
OCT
Receive (1)
Transmitter
25 ï
50 ï
VREF
VCCIO
Parallel OCT
100 ï
100 ï
Receiver
OCT
VCCIO
Series OCT
50 ï
100 ï
in Bi-
Directional
50
Pins (1)
100 ï
Transmitter
VCCIO
100 ï
100 ï
Series
OCT 50 ï
Receiver
Note to Figure 6â11:
(1) Applicable to Arria II GZ devices only.
Transmitter
VTT
25 ï
50 ïï
50 ï
VREF
VCCIO Parallel OCT
100 ï
100 ï
Receiver
VCCIO
Series OCT
25 ï
100 ï
100 ï
50 ï
Transmitter
VCCIO
100 ï
100 ï
Series
OCT 25 ï
Receiver
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2011 Altera Corporation
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