EP2AGX95EF29C6N Datasheet, PDF (325/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
Device Configuration Pins
9–39
Device Configuration Pins
Table 9–15 through Table 9–18 list the connections and functionality of all the
configuration-related pins on the Arria II devices.
Table 9–15 lists the Arria II configuration pins and their power supply.
Table 9–15. Configuration Pin Summary for Arria II Devices
Description
Input/Output
Dedicated
Powered By (1) Configuration Mode
TDI
TMS
TCK
TRST
TDO
CRC_ERROR
Input
Input
Input
Input
Output
Output
Yes
V_CCPD/V_CCIO
JTAG
Yes
V_CCPD/V_CCIO
JTAG
Yes
V_CCPD/V_CCIO
JTAG
Yes
V_CCPD/V_CCIO
JTAG
Yes
V_CCPD/V_CCIO
JTAG
—
Pull-up
Optional, all modes
DATA0
DATA[7..1]
INIT_DONE
Input
Input
Output
—
V_CCPGM/V_CCIO (2) All modes except JTAG
—
V_CCPGM/V_CCIO (2)
FPP
—
Pull-up
Optional, all modes
CLKUSR
Input
—
V_CCPGM/V_CCIO (2)
Optional
nSTATUS
Bidirectional
Yes
V_CCPGM/Pull-up
All modes
nCE
Input
Yes
V_CCPGM/V_CCIO
All modes
CONF_DONE
Bidirectional
Yes
V_CCPGM/Pull-up
All modes
nCONFIG
Input
Yes
V_CCPGM/V_CCIO
All modes
ASDO
Output
Yes
V_CCPGM/V_CCIO
AS
nCSO
Output
Yes
V_CCPGM/V_CCIO
AS
DCLK
Input
Output
Yes
V_CCPGM/V_CCIO
Yes
V_CCPGM/V_CCIO
PS, FPP
AS
nIO_PULLUP
Input
Yes
V_CC (3)
All modes
nCEO
Output
—
V_CCPGM/Pull-up
All modes
MSEL[2..0] (4)
Input
Yes
V_CCIO (6)
All modes
MSEL[3..0] (5)
Input
Yes
V_CCPD
All modes
Notes to Table 9–15:
(1) Arria II GX devices use V_CCIO while Arria II GZ devices use V_CCPD.
(2) For Arria II GZ devices, these pins are powered up by V_CCPGM during configuration and V_CCIO if they are used as a regular I/O in user mode.
(3) Although the nIO_PULLUP is powered up by V_CC, Altera recommends connecting this pin to V_CCPGM for Arria II GZ devices, V_CCIO for Arria II GX
devices, or GND directly without using a pull-up or pull-down resistor.
(4) Arria II GZ devices use a MSEL[2..0] configuration scheme.
(5) Arria II GX devices use a MSEL[3..0] configuration scheme.
(6) Although MSEL[2..0], PORSEL, and nIO_PULLUP are powered by V_CC, Altera recommends connecting these pins to V_CCPGM or GND directly
without using a pull-up or pull-down resistor.
July 2012 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration