EP2AGX95EF29C6N Datasheet, PDF (33/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Arria II Devices
2–3
Logic Array Blocks
LAB Interconnects
The LAB local interconnect drives the ALMs in the same LAB using column and row
interconnects and the ALM outputs in the same LAB. The direct link connection
feature minimizes the use of row and column interconnects, providing higher
performance and flexibility. Adjacent LABs/MLABs, memory blocks, or DSP blocks
from the left or right can also drive the LAB’s local interconnect through the direct
link connection. Each LAB can drive 30 ALMs through fast local and direct link
interconnects. Ten ALMs are in any given LAB and ten ALMs are in each of the
adjacent LABs.
Figure 2–3 shows the direct link connection, which connects adjacent LABs, memory
blocks, DSP blocks, or I/O element (IOE) outputs.
Figure 2–3. Direct Link Connection
Direct link interconnect from
left LAB, memory block,
DSP block, or IOE output
Direct link interconnect from
right LAB, memory block,
DSP block, or IOE output
ALMs
ALMs
Direct link
interconnect
to left
Local
Interconnect
Direct link
interconnect
to right
MLAB
LAB
December 2010 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration