EP2AGX95EF29C6N Datasheet, PDF (372/380 Pages) Altera Corporation – Device Interfaces and Integration

11–6
Chapter 11: JTAG Boundary-Scan Testing in Arria II Devices
Disabling IEEE Std. 1149.1 BST Circuitry
Table 11–3. Supported TDO/TDI Voltage Combinations for Arria II GX Devices (Part 2 of 2)
Device
TDI Input Buffer
Arria II GX TDO V_CCIO Voltage Level in I/O Bank 8C
Power
V_CCIO = 3.3 V (1) V_CCIO = 3.0 V (1) V_CCIO = 2.5 V (2) V_CCIO = 1.8 V
V_CC = 3.3 V
v
v
v
v (3)
Non-Arria II GX
V_CC = 2.5 V
v (4)
v (4)
v
v (3)
V_CC = 1.8 V
v (4)
v (4)
v (5)
v
V_CC = 1.5 V
v (4)
v (4)
v (5)
v (6)
Notes to Table 11–3:
(1) The TDO output buffer meets V_OH (Min) = 2.4 V.
(2) The TDO output buffer meets V_OH (Min) = 2.0 V.
(3) An external 250- pull-up resistor is not required; however, they are recommended if signal levels on the board are not optimal.
(4) The input buffer must be 3.0-V tolerant.
(5) The input buffer must be 2.5-V tolerant.
(6) The input buffer must be 1.8-V tolerant.
V_CCIO = 1.5 V
Level shifter
required
Level shifter
required
Level shifter
required
v
Table 11–4. Supported TDO/TDI Voltage Combinations for Arria II GZ Devices
Device
TDI Input Buffer Power
Arria II GZ
V_CCPD = 3.0 V
V_CCPD = 2.5 V
V_CC = 3.3 V
Non-Arria II GZ
V_CC = 2.5 V
V_CC = 1.8 V
V_CC = 1.5 V
Notes to Table 11–4:
(1) The TDO output buffer meets V_OH (Min) = 2.4 V.
(2) The TDO output buffer meets V_OH (Min) = 2.0 V.
(3) The input buffer must be 3.0-V tolerant.
(4) The input buffer must be 2.5-V tolerant.
Arria II GZ TDO V_CCPD Voltage Level in I/O Bank 1A
V_CCPD = 3.0 V (1)
v
v
v
v (3)
v (3)
v (3)
V_CCPD = 2.5 V (2)
v
v
v
v
v (4)
v (4)
f For more information about I/O voltage support in the JTAG chain, refer to the “I/O
Voltage Support in JTAG Chain” in the IEEE 1149.1 (JTAG) Boundary-Scan Testing for
Arria GX Devices chapter in volume 2 of the Arria GX Device Handbook.
Disabling IEEE Std. 1149.1 BST Circuitry
The IEEE Std. 1149.1 BST circuitry for Arria II devices is enabled after device
power up. Because the IEEE Std. 1149.1 BST circuitry is used for BST or in-circuit
reconfiguration, you must enable the circuitry only at specific times as mentioned in
“IEEE Std. 1149.1 BST Circuitry” in the IEEE 1149.1 (JTAG) Boundary-Scan Testing for
Arria GX Devices chapter in volume 2 of the Arria GX Device Handbook.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2013 Altera Corporation