EP2AGX95EF29C6N Datasheet, PDF (367/380 Pages) Altera Corporation – Device Interfaces and Integration

December 2013
AIIGX51011-4.1
AIIGX51011-4.1
11. JTAG Boundary-Scan Testing in
Arria II Devices
This chapter describes the boundary-scan test (BST) features that are supported in
Arria^® II devices and how to use the IEEE Std. 1149.1 and Std. 1149.6 BST circuitries in
Arria II devices. The features are similar to Arria GX devices, unless stated in this
chapter.
This chapter includes the following sections:
■ “BST Architecture for Arria II Devices” on page 11–1
■ “BST Operation Control” on page 11–3
■ “I/O Voltage Support in a JTAG Chain” on page 11–5
■ “Disabling IEEE Std. 1149.1 BST Circuitry” on page 11–6
■ “Boundary-Scan Description Language Support” on page 11–7
Arria II GX devices support IEEE Std. 1149.1 and IEEE Std. 1149.6, while Arria II GZ
devices support IEEE Std. 1149.1 only. The IEEE Std. 1149.6 is only supported on the
high-speed serial interface (HSSI) transceivers in Arria II GX devices. The IEEE Std.
1149.6 enables board-level connectivity checking between transmitters and receivers
that are AC coupled (connected with a capacitor in series between the source and
destination).
BST Architecture for Arria II Devices
For Arria II GX devices, the TDO output pin and all JTAG input pins are powered by
the V_CCIO power supply of I/O Bank 8C, while for Arria II GZ devices, the TDO output
pin and all the JTAG input pins are powered by 2.5-V/3.0-V V_CCPD supply of I/O
Bank 1A. All user I/O pins are tri-stated during JTAG configuration.
f
For more information about the IEEE Std. 1149.1 BST architecture, BST circuitry, and
boundary-scan register for Arria II devices, refer to the IEEE 1149.1 (JTAG)
Boundary-Scan Testing for Arria GX Devices chapter in volume 2 of the Arria GX Device
Handbook.
IEEE Std. 1149.6 Boundary-Scan Register for Arria II GX Devices
The boundary-scan cell (BSC) for HSSI transmitters (GXB_TX[p,n]) and
receivers/input clock buffer (GXB_RX[p,n])/(REFCLK[0..7]) in Arria II GX devices are
different from the BSCs for I/O pins.
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Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2013
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