EP2AGX95EF29C6N Datasheet, PDF (377/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 12: Power Management in Arria II Devices
Hot Socketing
12–3
Insertion or Removal of an Arria II Device from a Powered-Up System
Devices that do not support hot socketing can short power supplies when
powered up through the device signal pins. This irregular power up can damage both
the driving and driven devices and can disrupt card power up.
An Arria II device may be inserted into or removed from a powered up system board
without damaging or interfering with system-board operation.
For Arria II GX devices, you can power up or power down the V_CCIO, V_CC, and V_CCPD
supplies in any sequence and at any time between them. For Arria II GZ devices, you
can power up or power down the V_CC, V_CCIO, V_CCPD, and V_CCPGM supplies in any
sequence (provided that the V_CC powers up fully before V_CCAUX).
f For more information about the hot-socketing specification, refer to the Device
Datasheet for Arria II Devices chapter and the Hot-Socketing and Power-Sequencing
Feature and Testing for Altera Devices white paper.
Hot-Socketing Feature Implementation
Arria II devices are immune to latch-up when using the hot-socketing feature. The
hot-socketing feature turns off the output buffer during power up and power down of
the V_CC, V_CCIO, or V_CCPD power supplies for Arria II GX devices. Hot-socketing
circuitry generates an internal HOTSCKT signal when the V_CC, V_CCIO, or V_CCPD power
supplies for Arria II GX devices are below the threshold voltage. To support the
startup current as reported by the PowerPlay Early Power Estimator (EPE) for
Arria II GX devices, fully power V_CC before V_CCCB begins to ramp.
The hot-socketing feature turns off the output buffer during power up and power
down of the V_CC, V_CCIO, V_CCPD, and V_CCPGM power supplies for Arria II GZ devices.
To support the power-up sequence for all Arria II GZ devices, fully power V_CC before
V_CCAUX begins to ramp.
Hot-socketing circuitry is designed to prevent excess I/O leakage during power up.
When the voltage ramps up very slowly, it is still relatively low, even after the POR
signal is released and the configuration is completed. The CONF_DONE, nCEO, and
nSTATUS pins fail to respond, as the output buffer cannot flip from the state set by the
hot-socketing circuit at this low voltage. Therefore, the hot-socketing circuit is
removed on these configuration pins to ensure that they are able to operate during
configuration. Thus, it is the expected behavior for these pins to drive out during
power-up and power-down sequences.
1 Altera uses GND as reference for the hot-socketing operation and I/O buffer designs.
To ensure proper operation, Altera recommends connecting the GND between boards
before connecting to the power supplies. This prevents the GND on your board from
being pulled up inadvertently by a path to power through other components on your
board. A pulled up GND can otherwise cause an out-of-specification I/O voltage or
current condition with the Altera^® device.
June 2011 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration