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| EP2AGX95EF29C6N Datasheet, PDF (193/380 Pages) Altera Corporation – Device Interfaces and Integration | |||
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Chapter 6: I/O Features in Arria II Devices
Termination Schemes for I/O Standards
6â29
Figure 6â12 shows the details of HSTL I/O termination on Arria II devices.
Figure 6â12. HSTL I/O Standard Termination for Arria II Devices
Termination
External
On-Board
Termination
Transmitter
HSTL Class I
VTT
50 ï
50 ï
VREF
Receiver
Transmitter
HSTL Class II
VTT
VTT
50 ï 50 ï
50 ï
VREF
Receiver
OCT
Transmit
Series OCT 50 ï
Transmitter
VTT
50 ï
50 ï
VREF
Receiver
Series OCT 25 ï
Transmitter
VTT
VTT
50 ï 50 ï
50 ï
VREF
Receiver
OCT
Receive (1)
Transmitter
50 ï
VREF
VCCIO
100 ï
Parallel OCT
100 ï
Receiver
Transmitter
VTT
50 ï
50 ï
VREF
VCCIO
Parallel OCT
100 ï
100 ï
Receiver
OCT
in Bi-
Directional
Pins (1)
Series OCT
50 ï
VCCIO
100 ï
100 ï
Transmitter
50 ï
VCCIO
100 ï
100 ï
Series
OCT 50 ï
Receiver
Note to Figure 6â12:
(1) Applicable to Arria II GZ devices only.
Series OCT
25 ï
VCCIO
100 ï
50 8
100 ï
Transmitter
VCCIO
100 ï
100 ï
Series
OCT 25 ï
Receiver
December 2011 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration
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