EP2AGX95EF29C6N Datasheet, PDF (177/380 Pages) Altera Corporation – Device Interfaces and Integration

Chapter 6: I/O Features in Arria II Devices
I/O Structure
6–13
3.3-V I/O Interface
Arria II I/O buffers support 3.3-V I/O standards. You can use them as transmitters or
receivers in your system. The output high voltage (V_OH), output low voltage (V_OL),
input high voltage (V_IH), and input low voltage (V_IL) levels meet the 3.3-V I/O
standard specifications defined by EIA/JEDEC Standard JESD8-B with margin when
the V_CCIO voltage is powered by 3.3 V or 3.0 V for Arria II GX devices and 3.0 V only
for Arria II GZ devices.
To ensure device reliability and proper operation when interfacing a 3.3-V I/O system
with Arria II devices, do not exceed the absolute maximum ratings. Altera
recommends performing IBIS simulation to determine that the overshoot and
undershoot voltages are within the guidelines.
When you use the Arria II device as a transmitter, techniques to limit overshoot and
undershoot at the I/O pins include using slow slew rate and series termination.
Transmission line effects that cause large voltage deviations at the receiver are
associated with an impedance mismatch between the driver and transmission line. By
matching the impedance of the driver to the characteristic impedance of the
transmission line, you can significantly reduce overshoot voltage. You can use a series
termination resistor placed physically close to the driver to match the total driver
impedance to transmission line impedance. Other than 3.3-V LVTTL and 3.3-V
LVCMOS I/O standards, Arria II devices support R_S OCT for all LVTTL/LVCMOS
I/O standards in all I/O banks.
When you use the Arria II device as a receiver, use a clamping diode (on-chip or
off-chip) to limit overshoot. Arria II devices provide an optional on-chip PCI clamp
diode for I/O pins. You can use this diode to protect I/O pins against overshoot
voltage.
Another method for limiting overshoot is to use a 3.0-V V_CCIO bank supply voltage. In
this method, the clamp diode (on-chip or off-chip), can sufficiently clamp overshoot
voltage in the DC- and AC-input voltage specification. The clamped voltage can be
expressed as the sum of the supply voltage (V_CCIO) and the diode forward voltage. By
using the V_CCIO at 3.0 V, you can reduce overshoot and undershoot for all I/O
standards, including 3.3-V LVTTL/LVCMOS, 3.0-V LVTTL/LVCMOS, and 3.0-V
PCI/PCI-X. Additionally, lowering V_CCIO to 3.0 V reduces power consumption.
f For more information about the absolute maximum rating and maximum allowed
overshoot during transitions, refer to the Devices Datasheet for Arria II Devices chapter.
External Memory Interfaces
In addition to I/O registers in each IOE, Arria II devices also have dedicated registers
and phase-shift circuitry on all I/O banks for interfacing with external memory
interfaces.
f For more information about external memory interfaces, refer to the External Memory
Interfaces in Arria II Devices chapter.
December 2011 Altera Corporation
Arria II Device Handbook Volume 1: Device Interfaces and Integration