EP2AGX95EF29C6N Datasheet, PDF (180/380 Pages) Altera Corporation – Device Interfaces and Integration

6–16
Chapter 6: I/O Features in Arria II Devices
I/O Structure
Programmable Slew Rate Control
The output buffer for each Arria II device regular- and dual-function I/O pin has a
programmable output slew rate control that you can configure for low-noise or
high-speed performance. A faster slew rate provides high-speed transitions for
high-performance systems. A slow slew rate can help reduce system noise, but adds a
nominal delay to the rising and falling edges. Each I/O pin has an individual slew
rate control, allowing you to specify the slew rate on a pin-by-pin basis.
1 You cannot use the programmable slew rate feature with R_S OCT.
Table 6–9 lists the default slew rate settings from the Quartus II software.
Table 6–9. Default Slew Rate Settings for Arria II Devices
Arria II GX Device
I/O Standard
Slew
Rate
Option
1.2-V, 1.5-V, 1.8-V, 2.5-V LVCMOS, and 3.3-V LVTTL/LVCMOS (1)
0, 1
SSTL-2, SSTL-18, SSTL-15, HSTL-18, HSTL-15, and HSTL-12
1
3.0-V PCI/PCI-X
0, 1
LVDS_E_1R, mini-LVDS_E_1R, and RSDS_E_1R (2)
1
LVDS_E_3R, mini-LVDS_E_3R, and RSDS_E_3R
1
Notes to Table 6–9:
(1) Programmable slew rate is not supported for 3.3-V LVTTL/LVCMOS in Arria II GX devices.
(2) LVDS_E_1R and mini-LVDS_E_1R is not supported in Arria II GX devices.
Default
Slew
Rate
(Fast)
1
1
1
1
1
Arria II GZ Device
Slew
Rate
Option
0, 1, 2, 3
0, 1, 2, 3
0, 1, 2, 3
0, 1, 2, 3
0, 1, 2, 3
Default
Slew
Rate
(Fast)
3
3
3
3
3
You can use faster slew rates to improve the available timing margin in
memory-interface applications or when the output pin has high-capacitive loading.
1 Altera recommends performing IBIS or SPICE simulations to determine the right slew
rate setting for your specific application.
Open-Drain Output
Arria II devices provide an optional open-drain output (equivalent to an open
collector output) for each I/O pin. When configured as open drain, the logic value of
the output is either high-Z or 0. You must use an external pull-up resistor to pull the
high-Z output to logic high.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2011 Altera Corporation