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EP2AGX95EF29C6N Datasheet, PDF (242/380 Pages) Altera Corporation – Device Interfaces and Integration
7–40
Chapter 7: External Memory Interfaces in Arria II Devices
Arria II External Memory Interface Features
There are three registers in the DDR input registers block. Two registers capture data
on the positive and negative edges of the clock, and the third register aligns the
captured data. You can choose to use the same clock for the positive edge and
negative edge registers, or two complementary clocks (DQS/CQ for positive-edge
register and DQSn/CQn for negative-edge register). The third register that aligns the
captured data uses the same clock as the positive edge registers.
For Arria II GX devices, the resynchronization registers resynchronize the data to the
resynchronization clock domain. These registers are clocked by the resynchronization
clock that is generated by the PLL. The outputs of the resynchronization registers go
straight to the core.
For Arria II GZ devices, the resynchronization registers resynchronize the data to the
system clock domain. These registers are clocked by the resynchronization clock that
is generated by the PLL. The outputs of the resynchronization registers can go straight
to the core or to the HDR blocks, which are clocked by the divided-down
resynchronization clock.
Figure 7–27 shows the registers available in the Arria II GX output and output enable
paths. The device can bypass each block of the output and output enable path.
Figure 7–27. IOE Output and Output Enable Path Registers for Arria II GX Devices (Note 1)
OE
From core
datahi
From core
datainlo
From core
Double Data Rate Output-Enable Registers
DQ
DFF
OE Reg AOE
OR2
dataout
DQ
DFF
OE Reg BOE
Double Data Rate Output Registers
DQ
DFF
Output Reg Ao
1 dataout
0
DQ
DFF
Output Reg Bo
TRI
DQ or DQS
Write
Clock (2)
Notes to Figure 7–27:
(1) You can bypass each register block of the output and output-enable paths.
(2) The write clock comes from the PLL. The DQ write clock and DQS write clock have a 90° offset between them.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
June 2011 Altera Corporation