EP2AGX95EF29C6N Datasheet, PDF (344/380 Pages) Altera Corporation – Device Interfaces and Integration

9–58
Chapter 9: Configuration, Design Security, and Remote System Upgrades in Arria II Devices
Dedicated Remote System Upgrade Circuitry
Table 9–21 lists the status register contents for remote system upgrade.
Table 9–21. Remote System Upgrade Status Register Contents
Status Register Bit
Definition
POR Reset Value
CRC (from the configuration) CRC error caused reconfiguration
1 bit '0'
nSTATUS
nSTATUS caused reconfiguration
1 bit '0'
CORE_nCONFIG (1)
Device logic array caused reconfiguration
1 bit '0'
nCONFIG
nCONFIG caused reconfiguration
1 bit '0'
Wd
Watchdog timer caused reconfiguration
1 bit '0'
Note to Table 9–21:
(1) Logic array reconfiguration forces the system to load the application configuration data into the Arria II device. This
occurs after the factory configuration specifies the appropriate application configuration page address by updating
the update register.
Remote System Upgrade State Machine
The remote system upgrade control and update registers have identical bit
definitions, but serve different roles (refer to Figure 9–26 on page 9–56). While both
registers can only be updated when the device is loaded with a factory configuration
image, the update register writes are controlled by the user logic; the control register
writes are controlled by the remote system upgrade state machine.
In factory configurations, the user logic sends the AnF bit (set high), the page address,
and the watchdog timer settings for the next application configuration bit to the
update register. When the logic array configuration reset (RU_nCONFIG) goes low, the
remote system upgrade state machine updates the control register with the contents
of the update register and starts system reconfiguration from the new application
page.
1 To ensure successful reconfiguration between the pages, assert the RU_nCONFIG signal
for a minimum of 250 ns. This is equivalent to strobing the reconfig input of the
ALTREMOTE_UPDATE megafunction high for a minimum of 250 ns.
In the event of an error or reconfiguration trigger condition, the remote system
upgrade state machine directs the system to load a factory or application
configuration (page zero or page one, based on the mode and error condition) by
setting the control register accordingly. Table 9–22 lists the contents of the control
register after such an event occurs for all possible error or trigger conditions.
The remote system upgrade status register is updated by the dedicated error
monitoring circuitry after an error condition but before the factory configuration is
loaded.
Table 9–22. Control Register Contents after an Error or Reconfiguration Trigger Condition
(Part 1 of 2)
Reconfiguration Error/Trigger
Control Register Setting Remote Update
nCONFIG reset
nSTATUS error
CORE triggered reconfiguration
All bits are 0
All bits are 0
Update register
Arria II Device Handbook Volume 1: Device Interfaces and Integration
July 2012 Altera Corporation