EP2AGX95EF29C6N Datasheet, PDF (234/380 Pages) Altera Corporation – Device Interfaces and Integration

7–32
Chapter 7: External Memory Interfaces in Arria II Devices
Arria II External Memory Interface Features
There are seven different frequency modes for Arria II GX DLLs, and eight different
frequency modes for Arria II GZ DLLs as shown in Table 7–10. Each frequency mode
provides different phase-shift selections. In frequency mode 0, 1, 2, and 3, the 6-bit
DQS delay settings vary with PVT to implement the phase-shift delay. In frequency
modes 4, 5, 6, and 7 only 5 bits of the DQS delay settings vary with PVT to implement
the phase-shift delay; the MSB of the DQS delay setting is set to 0.
Table 7–10. DLL Frequency Modes for Arria II Devices
Frequency Mode
Available Phase Shift
0
1
2
3
4
5
6
7 (1)
22.5, 45, 67.5, 90
30, 60, 90, 120
36, 72, 108, 144
45, 90, 135, 180
30, 60, 90, 120
36, 72, 108, 144
45, 90, 135, 180
60, 120, 180, 240
Note to Table 7–10:
(1) Frequency mode 7 is only available for Arria II GZ devices only.
Number of Delay Chains
16
12
10
8
12
10
8
6
f For the frequency range of each mode, refer to the Device Datasheet for Arria II Devices.
For a 0° shift, the DQS/CQ signal bypasses both the DLL and DQS logic blocks. The
Quartus II software automatically sets the DQ input delay chains so that the skew
between the DQ and DQS/CQ pin at the DQ IOE registers is negligible when the 0°
shift is implemented. You can feed the DQS delay settings to the DQS logic block and
the logic array.
The shifted DQS/CQ signal goes to the DQS bus to clock the IOE input registers of the
DQ pins. The signal can also go into the logic array for resynchronization if you do not
use the IOE resynchronization registers. The shifted CQn signal can go to the
negative-edge input register in the DQ IOE or the logic array and is only used for
QDR II+/QDR II SRAM interfaces.
Phase Offset Control
Each DLL has two phase offset modules and can provide two separate DQS delay
settings with independent offset; for Arria II GX devices, one offset goes clockwise
half-way around the chip and the other goes counter-clockwise half-way around the
chip and for Arria II GZ devices, one for the top and bottom I/O bank and one for the
left and right I/O bank. Even though you have independent phase offset control, the
frequency of the interface with the same DLL must be the same. Use the phase offset
control module for making small shifts to the input signal and use the DQS
phase-shift circuitry for larger signal shifts. For example, if the DLL only offers a
multiple of 30° phase shift, but your interface must have a 67.5° phase shift on the
DQS signal, you can use two delay chains in the DQS logic blocks to give you a 60°
phase shift and use the phase offset control feature to implement the extra 7.5° phase
shift.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
June 2011 Altera Corporation