EP2AGX95EF29C6N Datasheet, PDF (158/380 Pages) Altera Corporation – Device Interfaces and Integration

5–50
Chapter 5: Clock Networks and PLLs in Arria II Devices
PLLs in Arria II Devices
Charge Pump and Loop Filter
You can reconfigure the charge pump and loop filter settings to update the PLL
bandwidth in real time. Table 5–17 through Table 5–19 show the possible settings for
charge pump current (Icp), loop filter resistor (R), and capacitor (C) values for Arria II
PLLs.
Table 5–17. charge_pump_current Bit Settings for Arria II Devices
CP[2]
CP[1]
CP[0]
Decimal Value for Setting
0
0
0
0
0
0
1
1
0
1
1
3
1
1
1
7
Table 5–18. loop_filter_r Bit Settings for Arria II Devices
LFR[4]
0
0
0
0
1
1
1
1
1
1
1
LFR[3]
0
0
0
1
0
0
0
1
1
1
1
LFR[2]
0
0
1
0
0
0
1
0
0
1
1
LFR[1]
0
1
0
0
0
1
0
0
1
0
1
LFR[0]
0
1
0
0
0
1
0
0
1
0
0
Decimal Value for Setting
0
3
4
8
16
19
20
24
27
28
30
Table 5–19. loop_filter_c Bit Settings for Arria II Devices
LFC[1]
0
0
1
LFC[0]
0
1
1
Decimal Value for Setting
0
1
3
Arria II Device Handbook Volume 1: Device Interfaces and Integration
July 2012 Altera Corporation