SH7750_08 Datasheet, PDF (938/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 20 User Break Controller (UBC)
20.2 Register Descriptions
20.2.1 Access to UBC Control Registers
The access size must be the same as the control register size. If the sizes are different, a write will
not be effected in a UBC register write operation, and a read operation will return an undefined
value. UBC control register contents cannot be transferred to a floating-point register using a
floating-point memory load instruction.
When a UBC control register is updated, use either of the following methods to make the updated
value valid:
1. Execute an RTE instruction after the memory store instruction that updated the register. The
updated value will be valid from the RTE instruction jump destination onward.
2. Execute instructions requiring 5 states for execution after the memory store instruction that
updated the register. As the CPU executes two instructions in parallel and a minimum of 0.5
state is required for execution of one instruction, 11 instructions must be inserted. The updated
value will be valid from the 6th state onward.
Rev.7.00 Oct. 10, 2008 Page 854 of 1074
REJ09B0366-0700