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| SH7750_08 Datasheet, PDF (607/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer | |||
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CKIO
RD/FRAME
D31âD0
CSn
RD/WR
Tm1
Section 13 Bus State Controller (BSC)
Tmd1
Tmd2
A
D0
D1
RDY
BS
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.68 MPX Interface Timing 11
(Burst Write Cycle, AnW = 0, No External Wait, Bus Width: 32 Bits,
Transfer Data Size: 64 Bits)
Rev.7.00 Oct. 10, 2008 Page 523 of 1074
REJ09B0366-0700
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