SH7750_08 Datasheet, PDF (1106/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix A Address List
Area 7
Power-On Manual
Module Register P4 Address Address^*1 Size Reset
Reset
Synchro-
nization
Sleep Standby Clock
H-UDI SDIR
H'FFF0 0000 H'1FF0 0000 16 H'FFFF^*2 Held
Held Held Pck
H-UDI SDDR H'FFF0 0008 H'1FF0 0008 32 Undefined Held
Held Held Pck
H-UDI SDINT^*5 H'FFF0 0014 H'1FF0 0014 16 H'0000
Held
Held Held Pck
Notes: 1. With control registers, the above addresses in the physical page number field can be
accessed by means of a TLB setting. When these addresses are referenced directly
without using the TLB, operations are limited.
2. Includes undefined bits. See the descriptions of the individual modules.
3. Use word-size access when writing. Perform the write with the upper byte set to H'5A or
H'A5, respectively. Byte- and longword-size writes cannot be used.
Use byte-size access when reading.
4. SH7750S, SH7750R only
5. SH7750R only
6. Includes power-down states
Rev.7.00 Oct. 10, 2008 Page 1022 of 1074
REJ09B0366-0700