SH7750_08 Datasheet, PDF (751/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 15 Serial Communication Interface (SCI)
Bit 1: CKE1 Bit 0: CKE0 Description
0
0
Asynchronous mode Internal clock/SCK pin functions as
input pin (input signal ignored)^*1
Synchronous mode
Internal clock/SCK pin functions as
serial clock output^*1
1
Asynchronous mode Internal clock/SCK pin functions as
clock output^*2
Synchronous mode
Internal clock/SCK pin functions as
serial clock output
1
0
Asynchronous mode External clock/SCK pin functions as
clock input^*3
Synchronous mode
External clock/SCK pin functions as
serial clock input
1
Asynchronous mode External clock/SCK pin functions as
clock input^*3
Synchronous mode
External clock/SCK pin functions as
serial clock input
Notes: 1. Initial value
2. Outputs a clock of the same frequency as the bit rate.
3. Inputs a clock with a frequency 16 times the bit rate.
15.2.7 Serial Status Register (SCSSR1)
Bit: 7
6
5
4
TDRE RDRF ORER FER
Initial value: 1
0
0
0
R/W: R/(W)* R/(W)* R/(W)* R/(W)*
Note: * Only 0 can be written, to clear the flag.
3
PER
0
R/(W)*
2
TEND
1
R
1
MPB
—
R
0
MPBT
0
R/W
SCSSR1 is an 8-bit register containing status flags that indicate the operating status of the SCI,
and multiprocessor bits.
SCSSR1 can be read or written to by the CPU at all times. However, 1 cannot be written to flags
TDRE, RDRF, ORER, PER, and FER. Also note that in order to clear these flags they must be
read as 1 beforehand. The TEND flag and MPB flag are read-only flags and cannot be modified.
SCSSR1 is initialized to H'84 by a power-on reset or manual reset, in standby mode, and in the
module standby state.
Rev.7.00 Oct. 10, 2008 Page 667 of 1074
REJ09B0366-0700