SH7750_08 Datasheet, PDF (1008/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 22 Electrical Characteristics
Table 22.24 Clock and Control Signal Timing (HD6417750RF240 (V))
V_DDQ = 3.0 to 3.6 V, V_DD = 1.5 V, T_a = –20 to +75°C, C_L = 30 pF
Item
Symbol
EXTAL
PLL1 6-times/PLL2
f_EX
clock input operation
frequency _{PLL1 12-times/PLL2}
f
EX
operation
PLL1/PLL2 not operating
EXTAL clock input cycle time
EXTAL clock input low-level pulse width
EXTAL clock input high-level pulse width
EXTAL clock input rise time
EXTAL clock input fall time
CKIO clock PLL1/PLL2 operating
output
PLL1/PLL2 not operating
CKIO clock output cycle time
CKIO clock output low-level pulse width
CKIO clock output high-level pulse width
CKIO clock output rise time
CKIO clock output fall time
CKIO clock output low-level pulse width
CKIO clock output high-level pulse width
Power-on oscillation settling time
Power-on oscillation settling time/mode
settling
f
EX
t_EXcyc
t_EXL
t_EXH
t_EXr
t
EXf
f_OP
f
OP
t
cyc
t
CKOL1
t_CKOH1
t_CKOr
t_CKOf
t_CKOL2
t
CKOH2
t_OSC1
t
OSCMD
SCK2 reset setup time
SCK2 reset hold time
MD reset setup time
MD reset hold time
RESET assert time
t
SCK2RS
t_SCK2RH
t_MDRS
t_MDRH
t_RESW
Min
16
14
1
30
3.5
3.5
—
—
25
1
11.9
1
1
—
—
3
3
10
10
20
20
3
20
20
PLL synchronization settling time
t_PLL
200
Standby return oscillation settling time 1 t
3
OSC2
Max Unit Figure
34
MHz
20
34
1000
—
—
4
4
84
34
1000
—
—
3
3
—
—
—
—
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ms
ms
22.1
22.1
22.1
22.1
22.1
22.2(1)
22.2(1)
22.2(1)
22.2(1)
22.2(1)
22.2(2)
22.2(2)
22.3, 22.5
22.3, 22.5
—
ns 22.11
—
ns 22.3, 22.5, 22.11
—
t_cyc
22.12
—
ns 22.3, 22.5, 22.12
—
t_cyc
22.3, 22.4, 22.5,
22.6, 22.11
—
μs 22.9, 22.10
—
ms 22.4, 22.6
Rev.7.00 Oct. 10, 2008 Page 924 of 1074
REJ09B0366-0700