SH7750_08 Datasheet, PDF (589/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Bus State Controller (BSC)
Memory Card Interface Basic Timing: Figure 13.51 shows the basic timing for the PCMCIA IC
memory card interface, and figure 13.52 shows the PCMCIA memory card interface wait timing.
CKIO
Tpcm1
Tpcm2
A25–A0
CExx
REG
RD/WR
RD
(read)
D15–D0
(read)
WE1
(write)
D15–D0
(write)
BS
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.51 Basic Timing for PCMCIA Memory Card Interface
Rev.7.00 Oct. 10, 2008 Page 505 of 1074
REJ09B0366-0700