SH7750_08 Datasheet, PDF (1092/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 22 Electrical Characteristics
Table 22.34 Peripheral Module Signal Timing (4)
Module
TMU,
RTC
SCI
I/O
ports
Item
Symbol
Timer clock
pulse width
(high)
t
TCLKWH
Timer clock
pulse width
(low)
t
TCLKWL
Timer clock
t
TCLKr
rise time
Timer clock
t_TCLKf
fall time
Oscillation t
ROSC
settling time
Input clock t
Scyc
cycle (asyn-
chronous)
Input clock t
Scyc
cycle (syn-
chronous)
Input clock
t_SCKW
pulse width
Input clock t
SCKr
rise time
Input clock fall t
SCKf
time
Transfer data t
TXD
delay time
Receive data t_RXS
setup time
(synchronous)
Receive data t
RXH
hold time
(synchronous)
Output data
delay time
t
PORTD
Input data
setup time
t
PORTS
Input data hold t
PORTH
time
HD6417750
VF128 (V)
*²
Min Max
4
—
4
—
— 0.8
— 0.8
—3
4
—
6
—
0.4 0.6
— 0.8
— 0.8
1.3 10
16 —
16 —
0.5 10
3.5 —
1.5 —
HD6417750
F167 (V)
*³
Min Max
4
—
4
—
— 0.8
— 0.8
—3
4
—
6
—
0.4 0.6
— 0.8
— 0.8
1.3 8
16 —
16 —
0.5 8
3.5 —
1.5 —
HD6417750
BP200M (V)
*⁴
Min Max Unit Figure
4
— Pcyc^*1 22.61
4
— Pcyc^*1 22.61
— 0.8 Pcyc^*1 22.61
— 0.8 Pcyc^*1 22.61
—3
s
22.62
4
— Pcyc^*1 22.63
6
— Pcyc^*1 22.63
0.4 0.6 t_Scyc
22.63
— 0.8 Pcyc^*1 22.63
— 0.8 Pcyc^*1 22.63
1.2 6
ns
22.64
16 — ns
22.64
16 — ns
22.64
0.5 6
ns
3
— ns
1.5 — ns
22.65
22.65
22.65
Rev.7.00 Oct. 10, 2008 Page 1008 of 1074
REJ09B0366-0700