SH7750_08 Datasheet, PDF (1014/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 22 Electrical Characteristics
Table 22.27 Clock and Control Signal Timing (HD6417750BP200M (V),
HD6417750SBP200 (V))
V_DDQ = 3.0 to 3.6 V, V_DD = 1.8 V, T_a = –20 to +75°C, C_L = 30 pF
Item
Symbol Min
EXTAL
PLL2
1/2 divider
f_EX
16
clock input operating operating
frequency
1/2 divider not f
8
EX
operating
PLL2 not 1/2 divider
f_EX
2
operating operating
1/2 divider not f_EX
1
operating
EXTAL clock input cycle time
t_EXcyc
15
EXTAL clock input low-level pulse width t
3.5
EXL
EXTAL clock input high-level pulse width t
3.5
EXH
EXTAL clock input rise time
t
—
EXr
EXTAL clock input fall time
t_EXf
—
CKIO clock PLL2 operating
f_OP
25
output
PLL2 not operating
f_OP
1
CKIO clock output cycle time
t_cyc
10
CKIO clock output low-level pulse width t
1
CKOL1
CKIO clock output high-level pulse width t_CKOH1
1
CKIO clock output rise time
t
—
CKOr
CKIO clock output fall time
t
—
CKOf
CKIO clock output low-level pulse width t
3
CKOL2
CKIO clock output high-level pulse width t_CKOH2
3
Power-on oscillation settling time
t_OSC1
10
Power-on oscillation settling time/mode t_OSCMD
10
settling
SCK2 reset setup time
SCK2 reset hold time
MD reset setup time
MD reset hold time
t
20
SCK2RS
t_SCK2RH
20
t
3
MDRS
t
20
MDRH
Max Unit Figure
67
MHz
34
67
34
1000
—
—
4
4
100
100
1000
—
—
3
3
—
—
—
—
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ms
ms
22.1
22.1
22.1
22.1
22.1
22.2 (1)
22.2 (1)
22.2 (1)
22.2 (1)
22.2 (1)
22.2 (2)
22.2 (2)
22.3, 22.5
22.3, 22.5
—
ns 22.11
—
ns 22.3, 22.5, 22.11
—
t
22.12
cyc
—
ns 22.3, 22.5, 22.12
Rev.7.00 Oct. 10, 2008 Page 930 of 1074
REJ09B0366-0700