SH7750_08 Datasheet, PDF (58/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

17.2 Register Descriptions ........................................................................................................ 778
17.2.1 Smart Card Mode Register (SCSCMR1) ............................................................. 778
17.2.2 Serial Mode Register (SCSMR1)......................................................................... 779
17.2.3 Serial Control Register (SCSCR1)....................................................................... 780
17.2.4 Serial Status Register (SCSSR1).......................................................................... 781
17.3 Operation .......................................................................................................................... 782
17.3.1 Overview.............................................................................................................. 782
17.3.2 Pin Connections ................................................................................................... 783
17.3.3 Data Format ......................................................................................................... 784
17.3.4 Register Settings .................................................................................................. 785
17.3.5 Clock.................................................................................................................... 787
17.3.6 Data Transmit/Receive Operations ...................................................................... 790
17.4 Usage Notes ...................................................................................................................... 797
Section 18 I/O Ports............................................................................................................ 803
18.1 Overview........................................................................................................................... 803
18.1.1 Features................................................................................................................ 803
18.1.2 Block Diagrams ................................................................................................... 804
18.1.3 Pin Configuration................................................................................................. 811
18.1.4 Register Configuration......................................................................................... 813
18.2 Register Descriptions ........................................................................................................ 814
18.2.1 Port Control Register A (PCTRA) ....................................................................... 814
18.2.2 Port Data Register A (PDTRA) ........................................................................... 815
18.2.3 Port Control Register B (PCTRB) ....................................................................... 816
18.2.4 Port Data Register B (PDTRB)............................................................................ 817
18.2.5 GPIO Interrupt Control Register (GPIOIC)......................................................... 818
18.2.6 Serial Port Register (SCSPTR1) .......................................................................... 819
18.2.7 Serial Port Register (SCSPTR2) .......................................................................... 821
Section 19 Interrupt Controller (INTC) ........................................................................ 825
19.1 Overview........................................................................................................................... 825
19.1.1 Features................................................................................................................ 825
19.1.2 Block Diagram..................................................................................................... 825
19.1.3 Pin Configuration................................................................................................. 827
19.1.4 Register Configuration......................................................................................... 827
19.2 Interrupt Sources............................................................................................................... 828
19.2.1 NMI Interrupt....................................................................................................... 828
19.2.2 IRL Interrupts ...................................................................................................... 829
19.2.3 On-Chip Peripheral Module Interrupts ................................................................ 831
19.2.4 Interrupt Exception Handling and Priority........................................................... 832
Rev.7.00 Oct. 10, 2008 Page lviii of lxxxiv
REJ09B0366-0700