SH7750_08 Datasheet, PDF (387/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 10 Clock Oscillation Circuits
Bit 5—Reset Select (RSTS): Specifies the kind of reset to be performed when WTCNT overflows
in watchdog timer mode. This setting is ignored in interval timer mode.
Bit 5: RSTS
0
1
Description
Power-on reset
Manual reset
(Initial value)
Bit 4—Watchdog Timer Overflow Flag (WOVF): Indicates that WTCNT has overflowed in
watchdog timer mode. This flag is not set in interval timer mode.
Bit 4: WOVF
0
1
Description
No overflow
WTCNT has overflowed in watchdog timer mode
(Initial value)
Bit 3—Interval Timer Overflow Flag (IOVF): Indicates that WTCNT has overflowed in
interval timer mode. This flag is not set in watchdog timer mode.
Bit 3: IOVF
0
1
Description
No overflow
WTCNT has overflowed in interval timer mode
(Initial value)
Rev.7.00 Oct. 10, 2008 Page 303 of 1074
REJ09B0366-0700