SH7750_08 Datasheet, PDF (1061/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 22 Electrical Characteristics
CKIO
BANK
TRp1 TRp2 TRp3 TRp4 TMw TMw2 TMw3 TMw4 TMw5
t_AD
t_AD
t_AD
Precharge-sel
Address
CSn
RD/WR
RAS
CASS
DQMn
D63–D0
(write)
BS
t_CSD t_CSD
t_RWD
t_RASD
t_CASD2
t_DQMD
t_WDD
t_CASD2
t_RWD
t_RASD
t_CASD2
t_CSD
t_RWD
t_RASD
t_CASD2
t_DQMD
t_WDD
t_BSD
CKE
DACKn
t_DACD
t_DACD
Legend:
IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 22.36 (a) Synchronous DRAM Bus Cycle: Synchronous DRAM Mode Register
Setting (PALL)
Rev.7.00 Oct. 10, 2008 Page 977 of 1074
REJ09B0366-0700