SH7750_08 Datasheet, PDF (399/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

11.2 Register Descriptions
Section 11 Realtime Clock (RTC)
11.2.1 64 Hz Counter (R64CNT)
R64CNT is an 8-bit read-only register that indicates a state of 64 Hz to 1 Hz within the RTC
frequency divider.
If this register is read when a carry is generated from the 128 kHz frequency division stage, bit 7
(CF) in RTC control register 1 (RCR1) is set to 1, indicating the simultaneous occurrence of the
carry and the 64 Hz counter read. In this case, the read value is not valid, and so R64CNT must be
read again after first writing 0 to the CF bit in RCR1 to clear it.
When the RESET bit or ADJ bit in RTC control register 2 (RCR2) is set to 1, the RTC frequency
divider is initialized and R64CNT is initialized to H'00.
R64CNT is not initialized by a power-on or manual reset, or in standby mode.
Bit 7 is always read as 0 and cannot be modified.
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
—
1 Hz 2 Hz 4 Hz 8 Hz 16 Hz 32 Hz 64 Hz
0 Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R
R
R
R
R
R
R
R
Rev.7.00 Oct. 10, 2008 Page 315 of 1074
REJ09B0366-0700