SH7750_08 Datasheet, PDF (362/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 9 Power-Down Modes
Standby → Manual Reset
Oscillation stops Reset
CKIO
RESET^*1
SCK2
STATUS Normal
Standby *2
Reset
Normal
0–10 Bcyc
0–30 Bcyc
Notes: 1. When standby mode is exited by means of a manual reset, a WDT count is not
performed. Hold RESET low for the PLL oscillation stabilization time.
2. Undefined
Figure 9.5 STATUS Output in Standby → Manual Reset Sequence
Rev.7.00 Oct. 10, 2008 Page 278 of 1074
REJ09B0366-0700