SH7750_08 Datasheet, PDF (917/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 19 Interrupt Controller (INTC)
Table 19.5 Interrupt Exception Handling Sources and Priority Order
Interrupt Source
INTEVT Interrupt Priority IPR (Bit
Code (Initial Value) Numbers)
Priority within
IPR Setting Unit
NMI
IRL
H-UDI
GPIO
DMAC
H'1C0
IRL3–IRL0 = 0 H'200
IRL3–IRL0 = 1 H'220
IRL3–IRL0 = 2 H'240
IRL3–IRL0 = 3 H'260
IRL3–IRL0 = 4 H'280
IRL3–IRL0 = 5 H'2A0
IRL3–IRL0 = 6 H'2C0
IRL3–IRL0 = 7 H'2E0
IRL3–IRL0 = 8 H'300
IRL3–IRL0 = 9 H'320
IRL3–IRL0 = A H'340
IRL3–IRL0 = B H'360
IRL3–IRL0 = C H'380
IRL3–IRL0 = D H'3A0
IRL3–IRL0 = E H'3C0
IRL0
H'240
IRL1
H'2A0
IRL2
H'300
IRL3
H'360
H-UDI
H'600
GPIOI
H'620
DMTE0
H'640
DMTE1
H'660
DMTE2
H'680
DMTE3
H'6A0
DMTE4^*2
H'780
DMTE5^*2
H'7A0
DMTE6^*2
H'7C0
DMTE7^*2
H'7E0
DMAE
H'6C0
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
15–0 (13)^*1
15–0 (10)^*1
15–0 (7)^*1
15–0 (4)^*1
15–0 (0)
15–0 (0)
15–0 (0)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IPRD (15–12)^*1 —
IPRD (11–8)^*1 —
IPRD (7–4)^*1 —
IPRD (3–0)^*1 —
IPRC (3–0) —
IPRC (15–12) —
IPRC (11–8)
High
↑
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
↓
Low
Default
Priority
High
↑
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
⏐
↓
Low
Rev.7.00 Oct. 10, 2008 Page 833 of 1074
REJ09B0366-0700