SH7750_08 Datasheet, PDF (1119/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Appendix E Pin Functions
Reset
(Power-On)
Signal Name
I/O Master Slave
RD2^*21
RD/WR2^*21
CKIO2ENB
O
Z^*20
Z^*20PZ^*9
H^*9*20
O
Z^*20
Z^*20PZ^*9
H^*9*20
I
PI
PI
CA
I
I
I
ASEBRK/BRKACK
I/O
PI^*22O^*22 PI^*22O^*22
Legend:
I: Input (not Pulled Up)
O: Output
Z: High-impedance (not Pulled Up)
H: High-level output
L: Low-level output
K: Output state held
PI: Input (Pulled Up)
PZ: High-impedance (Pulled Up)
Reset
(Manual)
Master Slave Standby
Z^*13*20
O^*9
Z^*13*20
H^*9
Z^*9*13
Z^*9*13
Z^*9*13O^*4
Z^*9*13H^*4
PI
PI
PI
I
I
I
PI^*22O^*22 PI^*22O^*22 PI^*22O^*22
Bus
Hardware
Released Standby
Z^*9*13O^*4 Z
Z^*9*13
Z
PI
Z
I
I
PI^*22O^*22 Z
Notes: 1. Output when area 2 is used as DRAM.
2. Output when area 5 is used as PCMCIA.
3. Output when area 6 is used as PCMCIA.
4. Z (I) or O on refresh operations, depending on register setting (BCR1.HIZCNT).
5. Depends on refresh operations.
6. Z (I) or H (state held), depending on register setting (BCR1.HIZMEM).
7. Z or O, depending on register setting (STBCR.PHZ).
8. Output when refreshing is set.
9. Operation in respective state when CKIO2ENB = 0 (SH7750/SH7750S) (High-level
outputs as SH7750R).
10. PZ or O, depending on register setting (FRQCR.CKOEN).
11. Pulled up or not pulled up, depending on register setting (STBCR.PPU).
12. Pulled up or not pulled up, depending on register setting (BCR1.IPUP).
13. Pulled up or not pulled up, depending on register setting (BCR1.OPUP).
14. Pulled up with a built-in pull-up resistance. However it, cannot use for fixation of an
input MD pin at the time of power-on reset. Pull up or down outside this LSI.
15. Output when refreshing is set (SH7750R only).
16. Z or O, depending on register setting (STBCR2.STHZ) (SH7750R only).
17. Z or O, depending on register setting (TOCR, TCOE)
Rev.7.00 Oct. 10, 2008 Page 1035 of 1074
REJ09B0366-0700