SH7750_08 Datasheet, PDF (797/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 15 Serial Communication Interface (SCI)
Serial Data Reception (Synchronous Mode): Figure 15.21 shows a sample flowchart for serial
reception.
Use the following procedure for serial data reception after enabling the SCI for reception.
When changing the operating mode from asynchronous to synchronous, be sure to check that the
ORER, PER, and FER flags are all cleared to 0. The RDRF flag will not be set if the FER or PER
flag is set to 1, and neither transmit nor receive operations will be possible.
Start of reception
Read ORER flag in SCSSR1
ORER = 1?
Yes
1. Receive error handling: If a
receive error occurs, read the
ORER flag in SCSSR1 , and
after performing the appropriate
error handling, clear the ORER
flag to 0. Transfer cannot be
resumed if the ORER flag is set
to 1.
2. SCI status check and receive
No
Error handling
data read: Read SCSSR1 and
check that the RDRF flag is set
Read RDRF flag in SCSSR1
to 1, then read the receive data
in SCRDR1 and clear the RDRF
flag to 0. Transition of the RDRF
No
RDRF = 1?
flag from 0 to 1 can also be
identified by an RXI interrupt.
Yes
Read receive data in SCRDR1,
and clear RDRF flag
in SCSSR1 to 0
No
All data received?
Yes
Clear RE bit in SCSCR1 to 0
End of reception
3. Serial reception continuation
procedure: To continue serial
reception, finish reading the
RDRF flag, reading SCRDR1,
and clearing the RDRF flag to 0,
before the MSB (bit 7) of the
current frame is received. (The
RDRF flag is cleared
automatically when the direct
memory access controller
(DMAC) is activated by a
receive-data-full interrupt (RXI)
request and the SCRDR1 value
is read.)
Figure 15.21 Sample Serial Reception Flowchart (1)
Rev.7.00 Oct. 10, 2008 Page 713 of 1074
REJ09B0366-0700