SH7750_08 Datasheet, PDF (1058/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 22 Electrical Characteristics
CKIO
BANK
Tpr
Tpc
t_AD
t_AD
Row
Precharge-sel
H/L
Address
CSn
RD/WR
RAS
CASS
DQMn
D63–D0
(write)
BS
t_CSD
t_CSD
t_RWD t_RWD
t_RASD t_RASD
t_CASD2
t_CASD2
t_DQMD
t_DQMD
t_WDD
t_WDD
t_BSD
CKE
DACKn
t_DACD
t_DACD
Legend:
IO: DACK device
SA: Single address DMA transfer
DA: Dual address DMA transfer
DACK set to active-high
Figure 22.33 Synchronous DRAM Bus Cycle: Synchronous DRAM Precharge Command
(RASD = 1, TPC[2:0] = 001)
Rev.7.00 Oct. 10, 2008 Page 974 of 1074
REJ09B0366-0700