SH7750_08 Datasheet, PDF (603/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Bus State Controller (BSC)
CKIO
RD/FRAME
D63–D0
CSn
RD/WR
Tm1 Tmd1 Tmd2 Tmd3 Tmd4
A
D0
D1
D2
D3
RDY
BS
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.64 MPX Interface Timing 7
(Burst Write Cycle, AnW = 0, No External Wait, Bus Width: 64 Bits,
Transfer Data Size: 32 Bytes)
Rev.7.00 Oct. 10, 2008 Page 519 of 1074
REJ09B0366-0700