SH7750_08 Datasheet, PDF (761/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 15 Serial Communication Interface (SCI)
The bit rate error in asynchronous mode is found from the following equation:
Pck × 10⁶
Error (%) = _{(N + 1) × B × 64 × 22n – 1} – 1 × 100
Table 15.3 shows sample SCBRR1 settings in asynchronous mode, and table 15.4 shows sample
SCBRR1 settings in synchronous mode.
Table 15.3 Examples of Bit Rates and SCBRR1 Settings in Asynchronous Mode
Bit Rate
(bits/s) n
110
1
150
1
300
0
600
0
1200
0
2400
0
4800
0
9600
0
19200 0
31250 0
38400 0
2
Error
N (%) n
141 0.03 1
103 0.16 1
207 0.16 0
103 0.16 0
51 0.16 0
25 0.16 0
12 0.16 0
6 –6.99 0
2 8.51 0
1 0.00 0
1 –18.62 0
Pck (MHz)
2.097152
2.4576
Error
Error
N (%) n N (%) n
148 –0.04 1 174 –0.26 1
108 0.21 1 127 0.00 1
217 0.21 0 255 0.00 1
108 0.21 0 127 0.00 0
54 –0.70 0 63 0.00 0
26 1.14 0 31 0.00 0
13 –2.48 0 15 0.00 0
6
–2.48 0 7
0.00 0
2
13.78 0 3
0.00 0
1
4.86 0 1
22.88 0
1
–14.67 0 1
0.00
3
Error
N (%)
212 0.03
155 0.16
77 0.16
155 0.16
77 0.16
38 0.16
19 –2.34
9 –2.34
4 –2.34
2 0.00
Rev.7.00 Oct. 10, 2008 Page 677 of 1074
REJ09B0366-0700