SH7750_08 Datasheet, PDF (26/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Item
Page
15.3.3 Multiprocessor 702 to
Communication
704
Function
Multiprocessor Serial
Data Reception:
Figure 15.15 Sample
Multiprocessor Serial
Reception Flowchart (1)
Figure 15.16 Example 706
of SCI Receive
Operation (Example with
8-Bit Data,
Multiprocessor Bit, One
Stop Bit)
Revision (See Manual for Details)
Description of 1. and 2. added, and figure replaced
Figure amended
1
Serial
data
Start
bit Data (ID1)
0 D0 D1
Stop Start Data
MPB _{bit bit (Data1)}
D7 1 1 0 D0 D1
Stop
MPB _bit
D7 0 1
1
Idle state
(mark state)
MPIE
RDRF
SCRDR1
value
ID1
RXI interrupt request
(multiprocessor
interrupt)
MPIE = 0
SCRDR1 data read
and RDRF flag
cleared to 0 by RXI
interrupt handler
As data is not this RXI interrupt
station's ID, MPIE request
bit is set to 1 again MPIE = 1
The RDRF flag
is cleared to 0
by the RXI
interrupt handler.
(a) Data does not match station's ID
1
Serial
data
Start
bit Data (ID2)
0 D0 D1
Stop Start Data
MPB _{bit bit} (Data2)
D7 1 1 0 D0 D1
Stop
MPB _bit
D7 0 1
1
Idle state
(mark state)
MPIE
RDRF
15.5 Usage Notes 720
Handling of TEND Flag
and TE Bit
SH7750 Only
722 to
724
SCRDR1
value
ID1
ID2
RXI interrupt request
(multiprocessor interrupt)
MPIE = 0
SCRDR1 data read
and RDRF flag
cleared to 0 by RXI
interrupt handler
As data matches this
station's ID, reception
continues and data is
received by RXI
interrupt handler
(b) Data matches station's ID
Newly added
Newly added
Data2
MPIE bit set
to 1 again
Rev.7.00 Oct. 10, 2008 Page xxvi of lxxxiv
REJ09B0366-0700