SH7750_08 Datasheet, PDF (594/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 13 Bus State Controller (BSC)
CKIO
Tpci0
Tpci
Tpci1w Tpci2 Tpci2w
Tpci0
Tpci
Tpci1w
Tpci2 Tpci2w
A25–A1
A0
CExx
REG (WE7)
RD/WR
IORD (WE2)
(read)
D15–D0
(read)
IOWR (WE3)
(write)
D15–D0
(write)
BS
RDY
IOIS16
DACKn
(DA)
Note: For DACKn, an example is shown where CHCRn.AL (access level) = 0 for the DMAC.
Figure 13.56 Dynamic Bus Sizing Timing for PCMCIA I/O Card Interface
Rev.7.00 Oct. 10, 2008 Page 510 of 1074
REJ09B0366-0700