SH7750_08 Datasheet, PDF (707/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 14 Direct Memory Access Controller (DMAC)
CLK
DBREQ
BAVL
TR
Wait for next DMA request
A25–A0
CA
CA
D63–D0
CMD
TDACK
DTR
MD = 10
D0 D1 D2 D3
D0 D1 D2 D3
RD
RD
ID1, ID0
Start of data transfer
Figure 14.44 Single Address Mode/Burst Mode/Level Detection/
External Bus → External Device Data Transfer
Rev.7.00 Oct. 10, 2008 Page 623 of 1074
REJ09B0366-0700