SH7750_08 Datasheet, PDF (796/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 15 Serial Communication Interface (SCI)
Transfer
direction
Serial clock
Serial data
LSB
Bit 0
Bit 1
MSB
Bit 7
Bit 0
Bit 1
Bit 6 Bit 7
TDRE
TEND
TXI interrupt
request
Data written to SCTDR1
and TDRE flag cleared to
0 in TXI interrupt handler
One frame
TXI interrupt
request
Figure 15.20 Example of SCI Transmit Operation
TEI interrupt
request
Rev.7.00 Oct. 10, 2008 Page 712 of 1074
REJ09B0366-0700