SH7750_08 Datasheet, PDF (157/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Process 1
Physical
memory
Section 3 Memory Management Unit (MMU)
Physical
Process 1 _memory
Process 1
Virtual
memory _{MMU Physical}
memory
(1)
Process 1
Physical
memory
Process 2
(2)
Virtual
Process 1 memory
MMU Physical
memory
Process 2
Process 3
Process 3
(3)
(4)
Figure 3.1 Role of the MMU
Rev.7.00 Oct. 10, 2008 Page 73 of 1074
REJ09B0366-0700