SH7750_08 Datasheet, PDF (860/1162 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer

Section 17 Smart Card Interface
17.1.2 Block Diagram
Figure 17.1 shows a block diagram of the smart card interface.
Module data bus
SCRDR1
RxD
SCRSR1
TxD
SCK
SCTDR1
SCTSR1
SCSCMR1
SCSSR1
SCSCR1
SCSMR1
SCSPTR1
SCBRR1
Baud rate
generator
Transmission/
reception
control
Parity generation
Clock
Parity check
External clock
SCI
Legend:
SCSCMR1: Smart card mode register
SCRSR1: Receive shift register
SCRDR1: Receive data register
SCTSR1: Transmit shift register
SCTDR1: Transmit data register
SCSMR1: Serial mode register
SCSCR1: Serial control register
SCSSR1: Serial status register
SCBRR1: Bit rate register
SCSPTR1: Serial port register
Figure 17.1 Block Diagram of Smart Card Interface
Internal
data bus
Pck
Pck/4
Pck/16
Pck/64
TXI
RXI
ERI
Rev.7.00 Oct. 10, 2008 Page 776 of 1074
REJ09B0366-0700